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1 publication date: february 2008 sdj00021aeb data sheet AN8150FB part no. package code no. qfp044-p-1010f
AN8150FB 2 sdj00021aeb contents ? overview ??..??????????????????????????????????????. 3 ? features ??..??????????????????????????????????????. 3 ? applications ???????????????????????????????????????. 3 ? package ?????????????...???????????????????????????. 3 ? type ?????.????????????????????????????????????? 3 ? block diagram ????????????????.??????????????????????. 4 ? pin descriptions ???????..??????????????????????????????. 5 ? absolute maximum ratings ????????..?????..??????????......??????? 7 ? operating supply voltage range ???????????????? ..??????????????. 7 ? electrical characteristics ???????.???????.???????????????????. 8 ? technical data ??????????????.????.???????????????????. 9 ? usage notes ???.?????????. ???????.?????? ?????????????. 17
AN8150FB 3 sdj00021aeb AN8150FB octal, high precision 13 -bit voltage output dac ? overview AN8150FB is ic which has octal 13 bit dacs constituted by bi-cmos process. ? features y resolution: 13-bit y built-in dac: 8 dacs. y integral linearity error: 2 lsb typ. y differential linearity error: 0.5 lsb typ. y supply voltage: +10.5 v (av cc ), ?7.5 v (av ee ), +5 v (v dd ) y output range: ?3.3 v to +7.7 v y dac input data: 13-bit parallel y dac selection address data: 3-bit parallel y input interface: ttl compatible ? applications y industrial instrumentation ? package y 44 pin plastic quad flat package (qfp type) ? type y silicon monolithic bipolar ic
AN8150FB 4 sdj00021aeb ? block diagram 15 16 17 18 19 20 21 22 23 24 25 26 27 8 9 10 13 12 7 40 39 31 30 28 33 34 36 35 37 42 41 43 1 44 2 14 3 4 6 29 5 38 dac latch a input latch a input latch b input latch c input latch d input latch e input latch f input latch g input latch h control logic dac latch b dac latch c dac latch d dac latch e dac latch f dac latch g dac latch h dac a (dac+buf) dac b (dac+buf) dac c (dac+buf) dac d (dac+buf) dac e (dac+buf) dac f (dac+buf) dac g (dac+buf) dac h (dac+buf) 11 32 d0(lsb) d1 d2 d3 d4 d5 d6 d7 d8 d11 d9 d10 d12(msb) a2 a1 a0 vrbcdef vrmcdef vrbgh vrmgh cs wr ld clr v dd v ss vrbab vrmab av ee av cc av ee av cc vouta voutb amprefab voutc voutd amprefcd voute voutf amprefef voutg vouth amprefgh note) this block diagram is for explaining functions. the part of the block diagram may be omitted, or it may be simplified.
AN8150FB 5 sdj00021aeb ? pin descriptions reference voltage (bottom) for dac g, h input vrbgh 31 reference voltage (midpoint) for dac g, h input vrmgh 30 analogue negative supply voltage power supply av ee 29 digital input (msb) input d12(msb) 27 digital input input d11 26 digital input input d10 25 digital input input d9 24 output voltage of dac h output vouth 32 asynchronous clear input input clr 28 offset adjustment for dac g, h input amprefgh 33 digital input input d8 23 output voltage of dac g output voutg 34 digital input input d7 22 digital input input d6 21 write digital input input wr 12 chip selection digital input input cs 11 address 0 digital input (lsb) input a0 10 address 1 digital input input a1 9 address 2 digital input (msb) input a2 8 load input input ld 7 analogue negative supply voltage power supply av ee 6 analogue positive supply voltage power supply av cc 5 reference voltage (midpoint) for dac a, b input vrmab 4 reference voltage (bottom) for dac a, b input vrbab 3 output voltage of dac a output vouta 2 offset adjustment for dac a, b input amprefab 1 digital input input d3 18 digital input input d2 17 digital input input d1 16 digital input (lsb) input d0(lsb) 15 ground for digital gnd v ss 14 digital positive supply voltage power supply v dd 13 digital input input d5 20 digital input input d4 19 description type pin name pin no.
AN8150FB 6 sdj00021aeb ? pin descriptions (continued) reference voltage (midpoint) for dac c, d, e, f input vrmcdef 39 analog positive supply voltage power supply av cc 38 output voltage of dac e output voute 37 offset adjustment for dac e, f input amprefef 36 output voltage of dac f output voutf 35 output voltage of dac b output voutb 44 output voltage of dac d output voutd 41 reference voltage (bottom) for dac c, d, e, f input vrbcdef 40 offset adjustment for dac c, d input amprefcd 42 output voltage of dac c output voutc 43 description type pin name pin no.
AN8150FB 7 sdj00021aeb ? absolute maximum ratings ma ma v *3 c ?55 to +125 t stg storage temperature 5 *3 c 0 to + 70 t opr operating ambient temperature 4 *2 mw 359 p d power dissipation 3 ? 10 i dd ? ?50 i ee ? ma 50 i cc supply current 2 7 v dd *1 v 19.7 av cc ?av ee supply voltage 1 note unit rating symbol parameter a no. ? operating supply voltage range ? ? ? +10.0 v to +11.0 v av cc ?7.7 v to ?6.8 v av ee note v unit 4.75 v to 5.25 v v dd supply voltage range range symbol parameter note) the values under the condition not exceeding the above absolute maximum ratings and the power dissipation. note) *1: the values under the condition not exceeding the above absolute maximum ratings and the power dissipation. *2: the power dissipation shown is the value at t a = 70 c for the independent (unmounted) ic package without a heat sink. when using this ic, refer to the ? p d ?t a diagram in the ? technical data and use under the condition not exceeding the allowable value. *3: except for the powe r dissipation, operating ambient temperature, and storage temperature, all ratings are for t a = 25 c.
AN8150FB 8 sdj00021aeb ma supply current ma supply current v/ s ? ? 3 ? sr output voltage slew rate 23 ? lsb 4 2 ? ? e l linearity error 17 ? bits ? 13 ? ? res resolution 16 *1 v vrm 0 ? ? v rb reference voltage (bottom) 15 *1 v ? 2.2 vrb ? v rm reference voltage (midpoint) 14 *1 v av ee + 3 ? ? ? v omin min. output voltage 13 *1 v ? ? av cc ?2 ? v omax max. output voltage 12 ? v v dd ? 0.7 v dd ? d ih high-level digital input voltage 10 lsb 10 4 ? ? e g gain error 21 lsb 8 4 ? ? e zs zero-scale error 20 ? lsb 8 4 ? ? e fs full-scale error 19 ? lsb 1 0.5 ? ? a ? ?3 ?6 ? a 1 ? ?1 ? ma 38 33 28 ? e d differential linearity error vrmcdef vrm = 2.2 v, vrb = 0 v i vrm high reference resistor current (2) ? i il low digital input current ? i cc supply current 18 8 5 s 30 ? ? ? t st settling time 24 lsb 8 4 ? ? e off offset error 22 ? vrbcdef vrm = 2.2 v, vrb = 0 v vrmab, vrmgh vrm = 2.2 v, vrb = 0 v ? ? a 1 ? ?1 ? i ih high digital input current 4 ? a ? ?1.5 ?3 i vrm high reference resistor current (1) 6 ? a ?1 330 ?1 600 ?1 870 vrbab, vrbgh vrm = 2.2 v, vrb = 0 v i vrb low reference resistor current (1) 7 ? a ? 2 660 ?3 200 ?3 740 i vrb low reference resistor current (2) 9 1 ? ?23 ?28 ?33 ? i ee 2 ? 1 0.01 ? i dd 3 ? v 0.3 v dd ? v ss d il low-level digital input voltage 11 limits typ unit max no te min conditions symbol parameter b no. ? electrical characteristics at av cc = 10.5 v, av ee = ?7.5 v, v dd = 5 v note) t a = 25 c 2 unless otherwise specified. note) *1: sets so that the following conditions are satisfied. for details, refer to ? technical data. v omax = 5 vrm ? 2.5 vrb ? 1.5 ampref < av cc ?2 v v omin = 2.5 vrb ? 1.5 ampref > av ee + 3 v
AN8150FB 9 sdj00021aeb ? technical data 1. i/o block circuit diagrams and pin function descriptions note) the characteristics listed below are reference values based on the ic design and are not guaranteed. analog negative supply voltage apply ?7.5 v normally . ? ? ?7.7 v to ?6.8 v 6, 29 analog positive supply voltage apply 10.5 v normally ? ? +10.0 v to +11.0 v 5, 38 dc = 2.2 v dc = 0 v dc = 2.2 v waveform and voltage offset adjustment pin of dac a, b. apply the same voltage as vrmab normally. 10 m or more 1 dac a to h output voltage 80 2, 32, 34, 35, 37, 41, 43, 44 reference voltage of dac a, b (bottom). apply 0 v normally. 1.38 k or more 3 reference voltage of dac a, b (midpoint) vrtab. i.e., 2 (vrmab?vrbab) is generated inside the ic. dac a, b output amplitude = 2.5 (vrtab ? vrbab) 10 m or more 4 impedance description internal circuit pin no. av cc (pin5, pin38) av ee (pin6, pin29) 1 av cc (pin 5, pin 38) av ee (pin 6, pin 29) av cc (pin 5, pin 38) av ee (pin 6, pin 29) 3 av cc (pin 5, pin 38) av ee (pin 6, pin 29) 4 pin 2, 32, 34, 35, 37, 41, 43, 44 7.7 v ?3.3 v
AN8150FB 10 sdj00021aeb ? technical data (continued) 1. i/o block circuit diagrams and pin function descriptions (continued) note) the characteristics listed below are reference values based on the ic design and are not guaranteed. digital ground ? ? 0 v 14 digital positive supply voltage apply 5 v normally. ? ? +4.75 v to +5.25 v 13 write digital input level trigger. the data is written to the input latch of dac selected at a2, a1, a0 when this pin is low . 10 m or more 12 waveform and voltage load input transfer the data of input latch to dac latch at ld. start dac settling. 10 m or more 7 address input a2: msb, a0: lsb 10 m or more 8, 9, 10 chip select digital input level trigger. dac determined by a1, a2, and a0 is selected when this pin is low. 10 m or more 11 impedance description internal circuit pin no. v ss (pin 14) v dd (pin 13) 7 v ss (pin14) v dd (pin13) v ss (pin 14) v dd (pin 13) 11 v ss (pin 14) v dd (pin 13) 12 pin 8, 9, 10 0v 5v 0v 5v 0v 5v 0v 5v
AN8150FB 11 sdj00021aeb ? technical data (continued) 1. i/o block circuit diagrams and pin function descriptions (continued) note) the characteristics listed below are reference values based on the ic design and are not guaranteed. reference voltage of dac g, h (bottom). apply 0 v normally. 1.38 k dc = 0 v 31 reference voltage of dac g, h (midpoint) vrtgh. i.e., 2 (vrmgh ? vrbgh) is generated inside the ic. dac g, h output amplitude = 2.5 (vrtgh ? vrbgh) 10 m or more dc = 2.2 v 30 waveform and voltage digital input db0: lsb, db12: msb 10 m or more 15 to 27 asynchronous clear input 0 v is output during low. the ? previous value is hold as for latch. 10 m or more 28 impedance description internal circuit pin no. v ss (pin 14) v dd (pin 13) v ss (pin 14) v dd (pin 13) 28 av cc (pin 5, pin 38) av ee (pin 6, pin 29) 30 pin 15 to 27 av cc (pin 5, pin 38) av ee (pin 6, pin 29) 31 0v 5v 0v 5v
AN8150FB 12 sdj00021aeb ? technical data (continued) 1. i/o block circuit diagrams and pin function descriptions (continued) note) the characteristics listed below are reference values based on the ic design and are not guaranteed. offset adjustment pin of dac c, d. apply the same voltage as vrmcd normally. 9k dc = 2.2 v 42 reference voltage of dac c, d, e, f (bottom). apply 0 v normally. 0.69 k dc = 0 v 40 dc = 2.2 v dc = 2.2 v dc = 2.2 v waveform and voltage offset adjustment pin of dac g, h. apply the same voltage as vrmgh normally. 9k 33 offset adjustment pin of dac e, f. apply the same voltage as vrmef normally. 9k 36 reference voltage of dac c, d, e, f (midpoint) vrtab. i.e., 2 (vrmcdef ? vrbcdef) is generated inside the ic. dac c, d, e, f output amplitude = 2.5 (vrtcdef ? vrbcdef) 10 m or more 39 impedance description internal circuit pin no. av cc (pin 5, pin 38) av ee (pin 6, pin 29) 33 av cc (pin 5, pin 38) av ee (pin 6, pin 29) 36 av cc (pin 5, pin 38) av ee (pin 6, pin 29) 40 av cc (pin 5, pin 38) av ee (pin 6, pin 29) 39 av cc (pin 5, pin 38) av ee (pin 6, pin 29) 42
AN8150FB 13 sdj00021aeb ? technical data (continued) 2. timing chart at operation of d/a converter at clr operation a0, a1, a2 data vout cs wr ldac clr t12 t14 t13 0 v settling time of vout compared to clr cancel s 30 t14 settling time of vout compared to clr s 30 t13 min. pulse width of clr ns 75 t12 settling time of vout compared to ldac s 30 t11 setup time of wr compared to ldac ns 100 t10 min. pulse width of ldac ns 75 t9 hold time of data compared to wr ns 15 t8 setup time of data compared to wr ns 15 t7 hold time of cs compared to wr ns 0 t6 setup time of cs compared to wr ns 0 t5 min. pulse width of wr ns 75 t4 pulse width of cs ns 75 t3 hold time of a0, a1, a2 compared to wr ns 25 t2 setup time of a0, a1, a2 compared to wr ns 25 t1 description unit rating symbol t1 t5 t2 t6 t3 t4 t8 t10 t9 t11 t7 vout
AN8150FB 14 sdj00021aeb ? technical data (continued) 3. truth table dac address dac h input latch 1 1 1 dac g input latch 0 1 1 dac f input latch 1 0 1 dac e input latch 0 0 1 dac d input latch 1 1 0 dac c input latch 0 1 0 dac b input latch 1 0 0 dac a input latch 0 0 0 C a0 a1 a2 dac operation t (0 v) t (0 v) x x x l l t dac latch x x 1 x 0 1 x 0 cs t (0 v) x x 0 x x 0 1 l x x 1 l 1 x 1 t 0 x 1 l x 1 1 l 1 1 1 t 0 0 1 input latch wr ld clr note) t: through l: latch
AN8150FB 15 sdj00021aeb ? technical data (continued) 4. dac code table ?3 v ?3.3 v 0 0000 0000 0000 ?2.99878 v ?3.29866 v 0 0000 0000 0001 : : : 1.99878 v 2.19866 v 0 1111 1111 1111 2 v 2.2 v 1 0000 0000 0000 2.00122 v 2.20134 v 1 0000 0000 0001 : : : 6.99878 v 7.69866 v 1 1111 1111 1111 ?3 v ?3.3 v dacout (min) 6.99878 v 7.69866 v dacout (max) 2 v 2.2 v midpoint electric potential 10 v[p-p] 11 v[p-p] output amplitude 0 v 0 v vrb 2 v (vrt = 4 v) 2.2 v (vrt = 4.4 v) *1 vrm unipolar bipolar note) *1: vrt = 2 vrm ? vrb (generated inside) vdac = (vrm?vrb) 2 d/8192+vrb (internal dac output voltage) dacout = 2.5 vdac ? 1.5 ampref ampref = vrm dac + ? dacout ampref 1.5r r vdac equivalent circuit of dac output block amp. vrt vrb
AN8150FB 16 sdj00021aeb ? technical data (continued) 5. p d ? t a diagram
AN8150FB 17 sdj00021aeb 1. this ic is intended to be used for industrial instrumentation. consult our sales staff in advance for information on the following applications: ? special applications in which exceptional quality and reliability are required, or if the failure or malfunction of this ic may directly jeopardize life or harm the human body. ? any applications other than the standard applications intended. 1) space appliance (such as artificial satellite, and rocket) 2) traffic control equipment (such as for automobile, airplane, train, and ship) 3) medical equipment for life support 4) submarine transponder 5) control equipment for power plant 7) weapon 8) others: applications of which reliability equivalent to 1) to 7) is required. 2. pay attention to the direction of lsi. when mounting it in the wrong direction onto the pcb (printed-circuit-board), it might smoke or ignite. 3. pay attention in the pcb (printed-circuit-board) pattern layout in order to prevent damage due to short circuit between pins. in addition, refer to the pin description for the pin configuration. 4. perform a visual inspection on the pcb before applying power, otherwise damage might happen due to problems such as a solder- bridge between the pins of the semiconductor device. also, perform a full technical verification on the assembly quality, becau se the same damage possibly can happen due to conductive substances, such as solder ball, that adhere to the lsi during transportation. 5. take notice in the use of this product that it might break or occasionally smoke when an abnormal state occurs such as output pin ?v cc short (power supply fault), output pin ? gnd short (ground fault), or output-to-output-pin short (load short). and, safety measures such as an installation of fuses are recommended because the extent of the above-mentioned damage and smoke emission will depend on the current capability of the power supply. 6. when using the lsi for new models, verify the safety including the long-term reliability for each product. 7. when the application system is designed by using this lsi, be sure to confirm notes in this book. be sure to read the notes to descriptions and the usage notes in the book. 8. power-on sequence note that this ic may be latched up depending on the power-on sequence because it has positive/negative multi-power supplies. the recommended power-on sequence is described below. 1) dv dd 2) av cc , vrt, vrb, ampref (no sequence limit) note) the sequence of av ee does not matter; that is, av ee does not malfunction either before or after dv dd . 9. dv dd voltage supply range the conversion accuracy of this ic may deteriorates depending on the voltage of dv dd and vrm. use the ic within the following range. 2 vrm ? vrb ? dv dd 0.3 v 10.the conversion accuracy of this ic deteriorates depending on the voltage of vrm. use the ic within the following range. vrb ? 0.3 v ? usage notes
AN8150FB 18 sdj00021aeb ? usage notes (continued) 11. output voltage and load resistance this ic has been designed to drive an output load resistance of 50 . when this ic is used with a resistance under 50 k , the integral linearity error might be worse. in this case, raise the power supply voltage to prevent it. determine the power supply voltage referring to the diagrams below. v ee ?v outmin output load resistance characteristics output load resistance (k ) v outmin ?v ee (v) v cc ?v outmax output load resistance characteristics output load resistance (k ) v cc ?v outmax (v)
request for your special attention and precautions in using the technical information and semiconductors described in this book (1) if any of the products or technical information described in this book is to be exported or provided to non-residents, the laws and regulations of the exporting country, especially, those with regard to security export control, must be observed. (2) the technical information described in this book is intended only to show the main characteristics and application circuit examples of the products, and no license is granted under any intellectual property right or other right owned by our company or any other company. therefore, no responsibility is assumed by our company as to the infringement upon any such right owned by any other company which may arise as a result of the use of technical information described in this book. (3) the products described in this book are intended to be used for standard applications or general electronic equipment (such as office equipment, communications equipment, measuring instruments and household appliances). consult our sales staff in advance for information on the following applications: ? special applications (such as for airplanes, aerospace, automobiles, traffic control equipment, combustion equipment, life support systems and safety devices) in which exceptional quality and reliability are required, or if the failure or malfunction of the prod- ucts may directly jeopardize life or harm the human body. ? any applications other than the standard applications intended. (4) the products and product specifications described in this book are subject to change without notice for modification and/or im- provement. at the final stage of your design, purchasing, or use of the products, therefore, ask for the most up-to-date product standards in advance to make sure that the latest specifications satisfy your requirements. (5) when designing your equipment, comply with the range of absolute maximum rating and the guaranteed operating conditions (operating power supply voltage and operating environment etc.). especially, please be careful not to exceed the range of absolute maximum rating on the transient state, such as power-on, power-off and mode-switching. otherwise, we will not be liable for any defect which may arise later in your equipment. even when the products are used within the guaranteed values, take into the consideration of incidence of break down and failure mode, possible to occur to semiconductor products. measures on the systems such as redundant design, arresting the spread of fire or preventing glitch are recommended in order to prevent physical injury, fire, social damages, for example, by using the products. (6) comply with the instructions for use in order to prevent breakdown and characteristics change due to external factors (esd, eos, thermal stress and mechanical stress) at the time of handling, mounting or at customer's process. when using products for which damp-proof packing is required, satisfy the conditions, such as shelf life and the elapsed time since first opening the packages. (7) this book may be not reprinted or reproduced whether wholly or partially, without the prior written permission of matsushita electric industrial co., ltd.

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